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SPECIFICATION:
- High output power with 500mW
- High input sensitivity with -116dBm
- Low costing, high performance and price ratio
- PLL and zero IF technology
- Fast PLL lock time
- High resolution PLL with 2.5 KHz step
- High data rate (up to 115.2 kbps with internal demodulatorŁ¬with external RC filter highest data rate is 256 kbps)
- 50 OHM antenna input/output
- Programmable TX power
- Programmable TX frequency deviation (from 15 to 240 KHz)
- Programmable receiver bandwidth (from 67 to 400 kHz)
- Analog and digital signal strength indicator (ARSSI/DRSSI)
- Automatic frequency control (AFC)
- Data quality detection (DQD)
- Internal data filtering and clock recovery
- RX synchron pattern recognition
- SPI compatible serial control interface
- Clock and reset signal output for external MCU use
- 16 bit RX Data FIFO
- Two 8 bit TX data registers
- Standard 10 MHz crystal reference
- Wakeup timer
- 2.2V ¨C 3.8V power supply for FSK IC, 12V power supply for power amplifier
- Standby current less than 0.3µA
- Supports very short packets (down to 3 bytes)
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